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| author | Mohit Agarwal <mohit.agarwal@sky.com> | 2021-10-10 15:12:23 +0100 |
|---|---|---|
| committer | Mohit Agarwal <mohit.agarwal@sky.com> | 2021-10-10 15:12:23 +0100 |
| commit | cba64fd45faf3f8d7981a8e28b0f21881d0f7eb5 (patch) | |
| tree | 7c035405b162a9bb46d2c5ffe2cc055664cc4a57 /notes/hardware.tex | |
| parent | 4d32410ba6d2bdf9b994bd889f698ba6b090c91d (diff) | |
Writing notes and questions.
Diffstat (limited to 'notes/hardware.tex')
| -rw-r--r-- | notes/hardware.tex | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/notes/hardware.tex b/notes/hardware.tex index d9cebed..0141944 100644 --- a/notes/hardware.tex +++ b/notes/hardware.tex @@ -29,9 +29,9 @@ cycle. It is very successful due to its need for only one memory unit and the ability to have general purpose rather than specific purpose hardware, which early computers were and had to be rewired to change. -The design however does lead to the \textbf{`von Neumann bottleneck'} as data -and instructions must be fetched from the same memory unit over the -same bus. +The design however does lead to the \textbf{`von Neumann bottleneck'} +as data and instructions must be fetched from the same memory unit +over the same bus. \section{Boolean logic} |
