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@@ -247,3 +247,17 @@ %J Karlstad University %G arXiv:1204.0447 [cs.CR] %D Apr 2012 + +%A Chen Chen^et^al +%T Xuantie-910: A Commercial Multi-Core 12-Stage Pipeline Out-of-Order 64-bit High Performance RISC-V Processor with Vector Extension +%D 2020 +%J ACM/IEEE 47th Annual International Symposium on Computer Architecture (ISCA) +%O DOI: 10.1109/isca45697.2020.00016 + +%T Instruction Sets Should Be Free: The Case For RISC-V +%A Krste Asanović +%A David A. Patterson +%J Electrical Engineering and Computer Sciences +%C University of California at Berkeley +%R UCB/EECS-2014-146 +%D Aug 2014 |